Ð þí r8ô(~¼ brcm,bcm2835fragment@0 ÿÿÿÿ__overlay__spi1_pins *spi1_cs_pins *fragment@1 ÿÿÿÿ__overlay__2AMdefault[$eÿÿÿÿÿÿÿÿÿÿÿÿnokaysc16is752@0nxp,sc16is752uy€ÿÿÿÿ‘œ¬¸= Ê*sc16is752@1nxp,sc16is752uy€ÿÿÿÿ‘ œ¬¸= Ê*spidev@2spidevu2A¸¡ nokay*fragment@2 ÿÿÿÿ__overlay__nokayfragment@3ç/__overlay__sc16is752_spi1_0_clk fixed-clockóá*__overrides__interrupts:0interrupts:0$clock-frequency:0__symbols__")/fragment@0/__overlay__/spi1_pins%3/fragment@0/__overlay__/spi1_cs_pins$@/fragment@1/__overlay__/sc16is752@0$L/fragment@1/__overlay__/sc16is752@1!X/fragment@1/__overlay__/spidev@2-b/fragment@3/__overlay__/sc16is752_spi1_0_clk__fixups__îp/fragment@0:target:0/fragment@1/__overlay__:cs-gpios:0/fragment@1/__overlay__:cs-gpios:12/fragment@1/__overlay__:cs-gpios:24/fragment@1/__overlay__/sc16is752@0:interrupt-parent:0/fragment@1/__overlay__/sc16is752@1:interrupt-parent:0u/fragment@1:target:0z/fragment@2:target:0__local_fixups__fragment@1__overlay__[sc16is752@0ysc16is752@1y__overrides__$ compatibletargetbrcm,pinsbrcm,functionphandle#address-cells#size-cellspinctrl-namespinctrl-0cs-gpiosstatusregclocksinterrupt-parentinterruptsgpio-controller#gpio-cellsspi-max-frequencynxp,modem-control-line-portstarget-path#clock-cellsclock-frequencyint_pin_0int_pin_1xtalspi1_pinsspi1_cs_pinssc16is752_0sc16is752_1spidev1_2sc16is752_clkgpiospi1aux